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Logic Design Engineer (FPGA)
Job opportunity. Deadline: 2026-11-13
- Type
- Job
- Organizer
- Square One Resources
- Deadline
- 13 November 2026
- Where
- Online
- Compensation
- 150 – 190 PLN + VAT (B2B) per hour
- Disciplines
- Electrical Engineering, Computer Engineering
About this opportunity
Seeking a Logic Design Engineer with FPGA experience for a fully remote position. The role involves performing functional verification, developing verification environments, and integrating VIPs for complex projects. Requires a B.Sc. in Electrical or Computer Engineering and at least 4 years of professional experience.
How to apply
The application link and the full call are available to members, together with every other open opportunity ranked around your practice.
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